Intel has long been an afterthought in mobile. The company's mobile Atom SoC business showed promise back in 2015 with the launch of the ASUS ZenFone 2, but it was then cancelled in 2016. The modem business was derided for being technologically inferior to Qualcomm's modems. Intel gained its first big break when Apple became its highest profile customer for modems, solely using them in the iPhone, but in 2019, Qualcomm and Apple reached a settlement in their legal disputes. Intel, therefore, was left with no option but to discontinue its mobile modem business, which was then sold to Apple, ironically enough. Right now, Intel has no involvement in the smartphone space, either when it comes to smartphone SoCs or modem chips. However, the company has continued its pursuits in low voltage chips designed to power 2-in-1 devices, laptops, foldable devices, and more. Intel's Core M, which was re-branded into the Core Y series, is still used in laptops such as the Apple MacBook Air. Now, Intel has revealed more details about its upcoming "Lakefield" chips, which are not Atom chips and not purely Core chips (although they will be branded as part of the "Intel Core" lineup). They can be viewed as the successor of the Core M/Core Y-series philosophy, and are designed to solidify Intel's leadership position against ARM in the ultra-mobile device space.

Intel has been teasing Lakefield chips since the past year, but the chips were only formally launched on Wednesday. Lakefield is Intel's first hybrid CPU program (think Intel's equivalent of ARM's big.LITTLE and DynamIQ concepts of multi-cluster computing). The Lakefield program leverages Intel's Foveros 3D packaging technology and features a hybrid CPU architecture for power and performance scalability. Intel says Lakefield processors are the smallest to deliver Intel Core performance and full Windows compatibility across productivity and content creation experiences for ultra-light and innovative form factors. (The "full Windows compatibility mention" is a shot fired across at Qualcomm, whose Snapdragon 8c and 8cx SoCs use emulation to use Win32 software on Windows.)

The Intel Core processors with Intel Hybrid Technology deliver full Windows 10 application compatibility in up to a 56% smaller package area for up to 47% smaller board size and extended battery life, according to Intel. This provides OEMs more flexibility in form factor design across single, dual, and foldable display devices. The Lakefield processors are the first Intel Core processors shipping with attached package-on-package memory (PoP), which further reduces board size. They are also the first Core chips to deliver as low as 2.5mW of standby SoC power, which is an up to 91% reduction compared to the Y-series chips. Finally, they are the first Intel processors to feature native dual internal display pipes, which Intel says makes them "ideally suited" for foldable and dual-screen PCs.

The first announced designs powered by the Lakefield processors include the Lenovo ThinkPad X1 Fold, which was announced at CES 2020 with the world's first folding OLED display in a PC (it will cost $2,499). It's expected to ship later this year. The Samsung Galaxy Book S is expected to be made available in select markets starting this month. The Microsoft Surface Neo, a dual-screen device that is due for shipping in Q4 2020, is also powered by the Lakefield platform.

The Lakefield processors will be branded as part of the Intel Core i5 and i3 series with Intel Hybrid Technology. They have a 10nm Sunny Cove core (this is the same microarchitecture that powers Ice Lake and the upcoming Tiger Lake), which will be used for more intense workloads and foreground applications, while four power-efficient Tremont cores (that usually power Atom chips) are used for less intense tasks. Both processors are fully compatible with 32-bit and 64-bit Windows applications, but as AnandTech notes, they use different instruction sets. Both set of cores will have access to a 4MB last level cache.

The Foveros 3D stacking technology enables the Lakefield processors to achieve a significant reduction in package area. It's now only 12x12x1 mm, which Intel notes is approximately the size of a dime. The reduction is achieved by stacking two logic dies and two layers of DRAM and three dimensions. This also eliminates the need for external memory.

With multi-core CPUs of different architectures, scheduling becomes an important topic. Intel says the Lakefield platform uses hardware-guided OS scheduling. This enables real-time communication between the CPU and the OS scheduler to run the right apps on the right cores. Intel says the hybrid CPU architecture delivers up to 24% better performance per SoC power and up to 12% faster single-threaded integer compute-intensive application performance. All of these comparisons are with respect to Intel Core i7-8500Y, which is a 14nm Amber Lake Y series Core i5 chip.

The Intel UHD Graphics has a more than 2x throughput for AI-enhanced workloads. Intel says its flexible GPU engine compute enables sustained high-throughput inference applications that include analytics, image resolution upscaling, and more. Compared to the Core i7-8500Y, the Lakefield platform delivers up to 1.7x better graphics performance. The Gen11 graphics here delivers the biggest leap in graphics for 7W Intel chips. Videos can be converted up to 54% faster, and there is support for up to four external 4K displays. Finally, the Lakefield chips support Intel's Wi-Fi 6 (Gigabyte+) and LTE solutions.

There will be two Lakefield processors available at first in the form of the Core i5-L16G7 and the Core i3-L13G4. The differences between the two can be seen in the table below. The i5 has more graphics Execution Units (EUs): 64 vs. 48. The grahics maximum frequency is capped at up to 0.5GHz (much lower than Amber Lake's 1.05GHz), which suggests that Intel is going wide and slow to boost performance while keeping power requirements in check at the same time. Both of them have the same TDP at 7W. The i5's base frequency is 1.4GHz, while the i3 has a measly 0.8GHz base frequency. The max single core turbo frequency (applicable only for the Sunny Cove core) is 3.0GHz and 2.8GHz for the i5 and the i3 respectively, while the max all core turbo frequency is 1.8GHz and 1.3GHz respectively. Presumably, Intel is relying on Sunny Cove's increased IPC over Skylake to offset these low clock speeds. Keep in mind there is only one "big" core (in comparative) terms, so don't expect these ultra-mobile chips to compete with regular U series chips found in the Ice Lake, Comet Lake, and Tiger Lake platforms. The memory support is LPDDR4X-4267, which is incidentally higher than Ice Lake.

AnandTech was able to provide more detail on the Lakefield chips. Supposedly, Intel told the publication that the Lakefield chips will use the Tremont cores for almost everything, and only call on the Sunny Cove core for user-experience type of interactions, such as typing or interacting with the screen. This is different from what Intel is stating in its news release. The Foveros technology means that the logic areas of the chip, such as the cores and the graphics, are placed on a 10+ nm die (the same process node that Ice Lake is fabricated on), while the IO parts of the chip are on a 22nm silicon die (the same process node that Ivy Bridge and Haswell were fabricated on, more than half a decade ago), and they are stacked together. How will the connections work between the cores? Intel has enabled 50-micron connection pads between the two disparate silicon pieces, along with power-focused TSVs (through silicon vias) to power the cores on the top layer.

Overall, the Lakefield platform seems promising. The biggest flaw of Intel's low-power chips has been that up until now, they have been priced too expensive. It doesn't seem that this will be changing with Lakefield, but at least consumers will get to expect new types of PCs such as the aforementioned first three devices powered by Lakefield. At least for now, Intel remains dominant in PC because of the overwhelming advantage of app support, and announcements such as Lakefield mean that ARM and Qualcomm will need to keep iterating to overcome Intel's intrinsic instruction set advantage.

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Sources: Intel, AnandTech