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Groundbreaking RISC-V chip combines CPU, GPU, and AI capabilities into one core
RISC-V is a budding new ecosystem, and a new chip that combines CPU, GPU, and AI capabilities into one core is shaping up to be very interesting.
RISC-V is an open standard instruction set architecture that is most frequently positioned as a competitor to Arm. It's low power, it's aimed at smaller devices, and it's completely open for anyone to use and implement. That openness has led to concerns surrounding fragmentation, but by and large, the RISC-V community is pretty bullish on its capabilities. Now, X-Silicon has announced that it has created a new "C-GPU," which is a CPU core with GPU capabilities.
RISC-V: How companies are pushing it into the future
RISC-V has been everywhere recently, and for good reason
RISC-V has been everywhere recently, with the alternative instruction set architecture (ISA) building momentum to challenge the dominance of x86 and ARM. This has included several high-profile announcements from Qualcomm and Google, as well as the recent formation of the RISE (RISC-V Software Ecosystem) Project with support from everyone from Red Hat to Intel. Google even recently announced that native Android support is coming to RISC.
Qualcomm partners with Google to launch a RISC-V Snapdragon Wear platform
Qualcomm is partnering with Google to launch a RISC-V Wear platform, a first of its kind.
Qualcomm and Google are expanding their collaboration on wearables in an interesting way, committing to creating a RISC-V-powered Snapdragon Wear platform for next-gen Wear OS experiences. We've already seen Google announce that RISC-V support is coming to Android, and given that Wear OS is based on Android, it makes a lot of sense.
What is RISC-V?
RISC-V is one of the latest contenders in the CPU arena, but what is it and how does it compare to its rivals?
Even for computing hobbyists, RISC-V is a bit in the weeds, but perhaps not for long. It's one of the rising stars in the computing world and is one of the most successful (if not the most successful) examples of open-source and open-standard hardware. It's predicted that tens of billions of RISC-V cores will be sold over the next few years, a number that would rival the amount of x86 and ARM cores sold in the same time frame. Here's everything you need to know about RISC-V and where it's going.
Google announces official Android RISC-V support
Google has officially announced its support for the RISC-V architecture, an alternative ISA without licensing fees.
Android, the operating system developed by Google, currently supports a couple of different instruction set architectures (ISAs), such as Arm and x86. Most devices that use Android, including smartphones, tablets, TVs, and smartwatches, use Arm-based chipsets. Intel stopped producing CPUs for phones, and support for MIPS was removed in NDK revision 17. However, one ISA that has a lot of chatter is Reduced Instruction Set Computer V, RISC-V, which is a free and open ISA. Anyone is free to design chips based on it without paying any licensing or royalty fees, and Google announced official support for it at the company's keynote that took place during the RISC-V Summit.
Android has been ported to a RISC-V board
Android is being ported to hardware based on the RISC-V architecture, an alternative ISA to x86 and ARM without licensing or royalty fees.
Google's Android operating system currently supports a handful of instruction set architecture (ISA) families, including ARM and x86. The vast majority of smartphones, tablets, TVs, and smartwatches that run Android today feature ARM-based chipset designs, as Intel has long since abandoned its handset CPUs while support for MIPS was dropped with NDK revision 17. While Google does not officially provide support for compiling Android on hardware based on the open RISC-V ISA, several development teams are working to run AOSP on RISC-V hardware. One such effort is led by T-Head, the business entity of Alibaba specializing in semiconductors, which today announced that they've successfully ported Android 10 onto its in-house RISC-V hardware.
Open Source RISC-V Core Designs, Why Google Cares and Why They Matter
RISC-V is a free and open source Instruction Set Architecture (ISA) standard for Systems-on-a-Chip (SoCs).
The CPU is one of the most crucial components of our computers, responsible of performing basic calculations, logical comparisons and moving data around. These simple tasks are the building blocks of any more complex operation, and make running our systems and programs possible.